The present invention relates generally to the manufacture of semiconductor integrated circuits (ICs) and more particularly to an improved ladder boat which supports the semiconductor wafers for processing.
Processing of semiconductor wafers (hereinafter called xe2x80x9cwafersxe2x80x9d) includes a number of heat treatments at elevated temperatures to diffuse dopants, to deposit oxide layers and so on. Vertical furnaces are extensively used for conducting heat treatments during so-called xe2x80x9chotxe2x80x9d processes which include low pressure chemical vapor deposition (LPCVD), atmospheric oxidation (ATM) and anneal steps. A vertical heat treatment furnace includes a ladder boat to hold the wafers that are disposed horizontally and spaced from another in the vertical direction. The wafers can be automatically loaded and unloaded in and out of the heat treatment furnace by the transfer fork of a robot.
FIG. 1, comprises of FIGS. 1A and 1B, which schematically show the top view and the cross-sectional view (taken along line AA of FIG. 1A) of a conventional ladder boat referenced 10, currently used in standard LPCVD furnaces. It is important to point out that the illustrations are not necessarily drawn to scale. Now turning to FIG. 1, as known for those skilled in the art, the ladder boat 10, comprises a top plate 11A and a bottom plate 11B, vertically opposing each other, six rectangular-shaped support rods 12 (the number can vary between four and six) are provided between the top and bottom plates. Grooves or slots are formed at equal distance in the support rods 12, by a grinding machine as standard that define lodgments to receive the silicon wafers 14. As a result, protrusions commonly referred to as dividers referenced 13, are created and they will support the silicon wafers 14, at their peripheral surface. As apparent in FIG. 1, dividers 13, have the general shape of squared teeth (although rounded teeth are also commonly used in the semiconductor industry). Plates 11A and 11B, are typically made of solar glass, while support rods 12, are made of quartz ware. Wafers 14, are separated in the vertical direction by a distance (labeled P in FIG. 1) referred to as the xe2x80x9cpitchxe2x80x9d in the technical literature. Typically, the capacity of such a conventional ladder boat is of 160 wafers with a pitch P of about 0.14 inch for a VTR 7000+ reactor (SVG-THERMCO, San Jose, Calif., USA) or 170 wafers with a pitch of 0.2 inch for a TEL ALPHA8 reactor (Tokyo Electron Limited, Tokyo, Japan).
It is important to notice that with this type of ladder boat 10, the contact zone between a wafer 14, and each of the dividers 13, supporting it, is a surface referenced S in FIG. 1, substantially a square in the present case. Typically, the value of contact surface S is about 6 mm2. In addition, because the ladder boat 10, is provided with six support rods 12, the total contact surface which is equal to 6xc3x97S (i.e. 36 mm2) can be relatively important.
Because monocrystalline silicon (the base material of semiconductor wafers) has a melting point of 1410xc2x0 C., crystalline defects tend to take place in vicinities of parts of the silicon wafers 14, supported by the support rods 12, at contact surface S, locations during standard heat treatments that are conducted at 1000xc2x0 C. and above. These defects form the well known xe2x80x9cslip linesxe2x80x9d or xe2x80x9cmicroscratchesxe2x80x9d which can be seen either by visual inspection or using magnifying lenses. It is widely admitted in the semiconductor industry that the origin of these microscratches comes from the fact that the wafers are supported at their periphery at a limited number of positions (six in the present case), so that large internal stresses take place in the wafer that are relieved by slip line formation. On the other hand, silicon and quartz particles collectively referred to as chipping particles can be found in vicinities of these contact surface S, locations as a result of mechanical friction.
In addition, each contact surface S, generates a cold zone on the wafer active surface which creates a substantial degradation of the thickness uniformity and contamination, of the deposited layer.
Finally, because LPCVD reactors include a vacuum system, the microscratches and chipping particles generation phenomena is increased by the vibrations caused by the pump. To solve this specific problem of vibrations, different ladder boat designs have been proposed so far. For example, the so-called xe2x80x9cring boatxe2x80x9d wherein the wafers are not supported by dividers in grooves of the support rods, rings instead are supported in the grooves and wafers held directly thereon. The peripheral edges of the wafers contact the rings and internal stresses are mitigated, reducing thereby the occurrence of micro-scratches. However, ring boats are difficult to fabricate and rather expensive. Moreover, the contact surface is too important because it is equal to the whole ring surface.
All these drawbacks are also valid for thermal oxidation and anneal steps that are performed at the atmospheric pressure, except the vibrations because no vacuum system is used in this case.
The presence of micro-scratches and chipping particles at the wafer backside is also critical later on in the wafer manufacturing process, because it generates defocused chip images during different photolithography steps (mainly at the deep trench and gate conductor formation) that are subsequently performed. The roughness of the wafer backside surface is locally so modified that it becomes impossible to keep all the wafer in the focus plan of the photolithography tool during its exposition to UV light creating thereby photolithography defects necessitating a rework step as it will be discussed in more details later on. Such a reworking operation substantially increases the wafer processing costs.
In addition, most of photolithography tools are provided with a vacuum operated chuck used to support and firmly hold the wafer during exposure to light. Moreover, the wafer is strongly distorted by the vacuum system to put the entire wafer in the focus plan the most accurately possible. The distortion force is strong enough to crash particles at the wafer backside which sometimes remain on the chuck. In this case, even if we have now to process a wafer having a clean backside, some photolithography defects are created during exposure of the clean wafer by a phenomena of backside cross-contamination. For 300 mm wafer processing, the distortion force applied to them becomes stronger and the probability to let crashed particles on the chuck significantly increases. As a consequence of this contamination, the photolithography tool must be stopped and the specific cleaning procedure recommended by the tool manufacturer is undertaken before the tool becomes operative again in the manufacturing line.
Faced to this acute problem of microscratches and chipping particles, semiconductor manufacturers have developed a number of wafer cleaning procedures that are performed after each LPCVD/ATM process to get a clean wafer backside in order to prevent the contamination of photolithography tool chucks. Currently, the preferred wafer backside cleaning process is done using an AS2000 cleaning tool (Dai Nippon Screen, Kyoto, Japan) which performs an efficient cleaning of both the active and backside faces of the wafer (including the edge) with DI water.
These micro-scratches and chipping particles defects at the wafer backside can induce up to 5% manufacturing yield loss per exposed wafer which is not negligible. Today, they are removed by a step of reworking the wafer to remove the deposited photoresist mask. Such additional operation of reworking which affect the manufacturing line throughput and the photolithography tool up-time is considered as a major problem by the IC manufacturer. As a matter of fact, photolithography is recognized to be certainly one of the most important step in IC manufacturing to date. No doubt that continuous progresses in this field in the last decade have resulted in a greater circuit performance by reducing the dimensions of the devices integrated in the semiconductor wafer.
TABLE I below points out the percentage of reworked wafers as a function of different types of products without and with the above described wafer cleaning process of the prior art.
As apparent in TABLE I, the more the integration density increases (0.25 xcexcm to 0.175 xcexcm), the more the number of reworked wafers increases. On the other hand, the wafer cleaning process only slightly reduces the number of reworked wafers.
With the conventional ladder boat design of FIG. 1, microscratches and chipping particles formation is impossible to avoid as a result of the important contact surface between the silicon wafer and the dividers on the one hand and of vibrations when LPCVD furnaces are used on the other hand. Accordingly, many problems can be expected in the subsequent photolithography steps. As a whole, microscratches and chipping particles are serious detractors of the manufacturing yields, the direct cause of the production of bad chips that are rejected. Therefore, in view of the above, the backside wafer quality becomes a critical parameter of the silicon wafer manufacturing. Ladder boats commercially available to date and wafer cleaning procedures have shown out their limits. Obviously, the mechanical contact between the wafer and the dividers of the ladder boat creates micro-scratches and chipping particles at wafer backside during wafer loading and unloading operations because the poor handling system accuracy to load wafers in narrow slots (standard wafer pitch is 0.14 inch). Therefore, the solution to the problem raised by microscratches and chipping particles, if any, can only come from an innovative design of the ladder boat.
The present invention is a novel method and an apparatus for the manufacture of semiconductor integrated circuits (ICs) and more particularly relates to an improved ladder boat which supports the semiconductor wafers for processing.
Therefore, one purpose of this invention is to provide an improved ladder boat that significantly reduces the contact surface between the silicon wafer and the dividers.
It is another purpose of the present invention to provide an improved ladder boat that significantly reduces the number of micro-scratches and chipping particles at the wafer backside for increased manufacturing yields.
Yet another purpose of the present invention to provide an improved ladder boat that reduces the cold zones at the wafer active face improving thereby the deposited layer thickness uniformity.
Still another purpose of the present invention to provide an improved ladder boat that reduces the impact of vibrations applied to the silicon wafer when it is processed in a LPCVD furnace.
Still yet another purpose of the present invention to provide an improved ladder boat that reduces the wafer manufacturing cost by eliminating the need of wafer cleaning procedures after each thermal processing step.
Yet another purpose of the present invention to provide an improved ladder boat that significantly reduces the number of microscratches and chipping particles at the wafer backside that has become an essential process parameter with recent advances in photolithography techniques.
Still another purpose of the present invention to provide an improved ladder boat that significantly reduces the number of reworked wafers at the photolithography stage.
Still yet another purpose of the present invention to provide an improved ladder boat that improves the photolithography tool up-time by eliminating the necessity of cleaning the vacuum chuck thereof when contaminated.
Therefore, in one aspect this invention comprises an improved ladder boat for supporting at least one semiconductor wafer for thermal treatment comprising:
(a) top and bottom plates vertically opposing each other and parallel in a horizontal direction;
(b) a plurality of support rods secured to said top and bottom plates to define an internal volume therebetween and which are provided with at least one divider to support said wafer,
wherein said wafer divider is profiled to have a ramp portion so that said wafer is seated on a sharp corner thereof.
In another aspect this invention comprises an improved process for forming a ladder boat comprising the steps of:
(a) forming at least one divider in a support rod, wherein said divider has a ramp shape extending outwardly from said support rod;
(b) securing at least three of said support rods with said at least one divider to a top plate and a bottom plate, and thereby forming said ladder boat.
According to a significant aspect of the present invention, the contact surface between the wafer backside at its periphery and the dividers is segmental or punctual.
The novel features believed to be characteristic of this invention are set forth in the appended claims. The invention itself, however, as well as other purposes and advantages thereof, may be best understood by reference to the following detailed description of an illustrated preferred embodiment to be read in conjunction with the accompanying drawings.